From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Disable TPS4 in favor of POST_LT_ADJ_REQ for testing purposes.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 3bd15054effe..7ccfa202dbc0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -792,6 +792,13 @@ static u32 intel_dp_training_pattern(struct intel_dp *intel_dp,
source_tps4 = intel_dp_source_supports_tps4(display);
sink_tps4 = dp_phy != DP_PHY_DPRX ||
drm_dp_tps4_supported(intel_dp->dpcd);
+
+ /* hax */
+ if (dp_phy == DP_PHY_DPRX &&
+ drm_dp_post_lt_adj_req_supported(intel_dp->dpcd) &&
+ crtc_state->port_clock != 810000)
+ sink_tps4 = false;
+
if (source_tps4 && sink_tps4) {
return DP_TRAINING_PATTERN_4;
} else if (crtc_state->port_clock == 810000) {
--
2.45.3
