The LCDC controller uses pixel clock provided by the multimedia clock controller (mmcc) instead of using LVDS PHY clock directly. Link LVDS clocks properly, taking MMCC into account. MDP4 uses custom code to handle LVDS panel. It predates handling EPROBE_DEFER, it tries to work when the panel device is not available, etc. Switch MDP4 LCDC code to use drm_panel_bridge/drm_bridge_connector to follow contemporary DRM practices. --- Changes in v2: - Rebase on top of msm-next. - Upgrade LVDS clock code to use clock providers and parent_data - Use LVDS clock from the MMCC instead of using LVDS PHY directly - Link to v1: https://lore.kernel.org/r/20220616090321.433249-1-dmitry.baryshkov@xxxxxxxxxx --- Dmitry Baryshkov (7): dt-bindings: display: msm: mdp4: add LCDC clock and PLL source drm/msm/mdp4: drop mpd4_lvds_pll_init stub drm/msm/mdp4: register the LVDS PLL as a clock provider drm/msm/mdp4: use parent_data for LVDS PLL drm/msm/mdp4: move move_valid callback to lcdc_encoder drm/msm/mdp4: switch LVDS to use drm_bridge/_connector arm: dts: qcom: apq8064: link LVDS clocks .../devicetree/bindings/display/msm/mdp4.yaml | 9 +- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 16 ++- drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 34 ++++-- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h | 16 +-- drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 55 +++++----- .../gpu/drm/msm/disp/mdp4/mdp4_lvds_connector.c | 121 --------------------- drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c | 28 ++--- 8 files changed, 86 insertions(+), 194 deletions(-) --- base-commit: 402fdf7dbdc47d0186c4ad4fb1467a05f017bc0f change-id: 20240317-fd-mdp4-lvds-e317f86fd99c Best regards, -- Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
