On Fri, 7 Feb 2025 at 12:50, Neil Armstrong <neil.armstrong@xxxxxxxxxx> wrote: > > The mdp1-mem is not supported on the SM8650 SoCs, so only support a single > mdp0-mem interconnect entry. No, please add cpu-cfg interconnect instead. > > Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml > index 24cece1e888bd35f169dc3764966685de4b6da1d..cee581513c519924712c7e0fc055099f886d0a99 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml > @@ -29,10 +29,10 @@ properties: > maxItems: 1 > > interconnects: > - maxItems: 2 > + maxItems: 1 > > interconnect-names: > - maxItems: 2 > + maxItems: 1 > > patternProperties: > "^display-controller@[0-9a-f]+$": > > -- > 2.34.1 > -- With best wishes Dmitry
