Hi,
On 26/01/2025 21:15, Aradhya Bhatia wrote:
Move the bridge pre_enable call before crtc enable, and the bridge
post_disable call after the crtc disable.
The sequence of enable after this patch will look like:
bridge[n]_pre_enable
...
bridge[1]_pre_enable
crtc_enable
encoder_enable
bridge[1]_enable
...
bridge[n]_enable
And, the disable sequence for the display pipeline will look like:
bridge[n]_disable
...
bridge[1]_disable
encoder_disable
crtc_disable
bridge[1]_post_disable
...
bridge[n]_post_disable
The definition of bridge pre_enable hook says that,
"The display pipe (i.e. clocks and timing signals) feeding this bridge
will not yet be running when this callback is called".
Since CRTC is also a source feeding the bridge, it should not be enabled
before the bridges in the pipeline are pre_enabled. Fix that by
re-ordering the sequence of bridge pre_enable and bridge post_disable.
Signed-off-by: Aradhya Bhatia <a-bhatia1@xxxxxx>
Signed-off-by: Aradhya Bhatia <aradhya.bhatia@xxxxxxxxx>
---
drivers/gpu/drm/drm_atomic_helper.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index f5532e3646e1..d2f19df9f418 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1298,9 +1298,9 @@ disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state)
{
encoder_bridge_disable(dev, old_state);
- encoder_bridge_post_disable(dev, old_state);
-
crtc_disable(dev, old_state);
+
+ encoder_bridge_post_disable(dev, old_state);
}
/**
@@ -1635,10 +1635,10 @@ encoder_bridge_enable(struct drm_device *dev, struct drm_atomic_state *old_state
void drm_atomic_helper_commit_modeset_enables(struct drm_device *dev,
struct drm_atomic_state *old_state)
{
- crtc_enable(dev, old_state);
-
encoder_bridge_pre_enable(dev, old_state);
+ crtc_enable(dev, old_state);
+
encoder_bridge_enable(dev, old_state);
drm_atomic_helper_commit_writebacks(dev, old_state);
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@xxxxxxxxxxxxxxxx>
Tomi
