John Keeping <jkeeping@xxxxxxxxxxxxxxxxx> writes:
Hello John,
Thanks for your patches!
> The ssd132x family of chips require the result pulse to be at least
> 100us in length. Increase the reset time to meet this requirement.
>
That's not what the datasheet says AFAIU. It says the following in the
"8.9 Power ON and OFF sequence" section.
Power ON sequence:
1. Power ON VDD.
2. After VDD become stable, set RES# pin LOW (logic LOW) for at least
3us (t1) and then HIGH (logic HIGH).
3. After set RES# pin LOW (logic LOW), wait for at least 3us (t2).
Then Power ON VCC.
4. After VCC become stable, send command AFh for display ON. SEG/COM
will be ON after 100ms (tAF).
> Signed-off-by: John Keeping <jkeeping@xxxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/solomon/ssd130x.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ssd130x.c
> index b777690fd6607..2622172228361 100644
> --- a/drivers/gpu/drm/solomon/ssd130x.c
> +++ b/drivers/gpu/drm/solomon/ssd130x.c
> @@ -363,7 +363,7 @@ static void ssd130x_reset(struct ssd130x_device *ssd130x)
>
> /* Reset the screen */
> gpiod_set_value_cansleep(ssd130x->reset, 1);
> - udelay(4);
> + usleep_range(100, 1000);
> gpiod_set_value_cansleep(ssd130x->reset, 0);
> udelay(4);
That's why I think that the udelay(4) are correct here, since that will
make for the delay to be bigger than 3 usecs.
Now, is true that the mentioned 100ms (tAF) after sending an AFh command
might not happen. Since I see there's no delay after sending a display ON
command in ssd130x_encoder_atomic_enable():
static void ssd130x_encoder_atomic_enable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
..
ssd130x_write_cmd(ssd130x, 1, SSD13XX_DISPLAY_ON);
Maybe the solution is to add the here?
Also, according to the timers-howto doc [0], the usleep_range() helper
should only be used for small msecs (in the 1~20ms range) and msleep()
used for larger msecs.
[0]: https://www.kernel.org/doc/Documentation/timers/timers-howto.rst
--
Best regards,
Javier Martinez Canillas
Core Platforms
Red Hat
