On 1/13/25 15:10, Dmitry Baryshkov wrote:
> On Sun, Jan 12, 2025 at 12:57:31AM +0530, Aradhya Bhatia wrote:
>> From: Aradhya Bhatia <a-bhatia1@xxxxxx>
>>
>> Allow the D-Phy config checks to use mode->clock instead of
>> mode->crtc_clock during mode_valid checks, like everywhere else in the
>> driver.
>
> Please describe why, not what.
It is unclear why the rest of the code uses mode->crtc_* parameters at
all during the non mode validation phase.
But during that phase, the crtc_* parameters are not generated
(duplicated in this case) from the regular ones, and so the validation
fails. The patch prevents that from happening by streamlining with
other instances.
I will update the commit text with this.
Regards
Aradhya
>
>>
>> Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework")
>> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@xxxxxxxxxxxxxxxx>
>> Signed-off-by: Aradhya Bhatia <a-bhatia1@xxxxxx>
>> Signed-off-by: Aradhya Bhatia <aradhya.bhatia@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
>> index 3b3c45df1399..9c743fde2861 100644
>> --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
>> +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c
>> @@ -568,13 +568,14 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi,
>> struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy;
>> unsigned long dsi_hss_hsa_hse_hbp;
>> unsigned int nlanes = output->dev->lanes;
>> + int mode_clock = (mode_valid_check ? mode->clock : mode->crtc_clock);
>> int ret;
>>
>> ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check);
>> if (ret)
>> return ret;
>>
>> - phy_mipi_dphy_get_default_config(mode->crtc_clock * 1000,
>> + phy_mipi_dphy_get_default_config(mode_clock * 1000,
>> mipi_dsi_pixel_format_to_bpp(output->dev->format),
>> nlanes, phy_cfg);
>>
>> --
>> 2.34.1
>>
>
