As promised in the basic wide planes support ([1]) here comes a series supporting 2*max_linewidth for all the planes. Note: Unlike v1 and v2 this series finally includes support for additional planes - having more planes than the number of SSPP blocks. Note: this iteration features handling of rotation and reflection of the wide plane. However rot90 is still not tested: it is enabled on sc7280 and it only supports UBWC (tiled) framebuffers, it was quite low on my priority list. IGT tests were manually exectuted at [2]. [1] https://patchwork.freedesktop.org/series/99909/ [2] https://gitlab.freedesktop.org/drm/msm/-/merge_requests/142/pipelines --- Changes in v8: - Fixed missing argument description in dpu_rm_release_all_sspp() - Link to v7: https://lore.kernel.org/r/20241130-dpu-virtual-wide-v7-0-991053fcf63c@xxxxxxxxxx Changes in v7: - Unify code between dpu_plane_atomic_check() and dpu_plane_virtual_assign_resources() (Abhinav) - Link to v6: https://lore.kernel.org/r/20241025-dpu-virtual-wide-v6-0-0310fd519765@xxxxxxxxxx Changes in v6: - Renamed dpu_plane_atomic_check_nopipe() -> dpu_plane_atomic_check_nosspp() and dpu_plane_atomic_check_pipes() -> dpu_plane_atomic_check_sspp() (Abhinav) - In dpu_rm_reserve_sspp() replaced hweight usage with explicit type allocation (Abhinav) - In dpu_plane_atomic_check() set r_pipe->sspp (Jun Nie) - In dpu_rm_reserve_sspp() check hw_sspp->ops.setup_scaler to rule out SSPP blocks with unsupported scaler blocks (RGB, QSEED2) - Link to v5: https://lore.kernel.org/r/20240627-dpu-virtual-wide-v5-0-5efb90cbb8be@xxxxxxxxxx Changes in v5: - Dropped extra dpu_kms instance from dpu_plane_atomic_check() (Abhinav) - Use DRM_PLANE_NO_SCALING instead of (1 << 16) (Abhinav) - Dropped excess returns documentation for dpu_rm_reserve_sspp() (Sui Jingfeng, Abhinav) - best_weght -> best_weight (Abhinav) - Moved drm_rect_width() call back to the the patch "split dpu_plane_atomic_check()" (Abhinav) - Got rid of saved_fmt / saved dimensions (Abhinav) - Expanded the commit message to describe SSPP allocation per CRTC id (Abhinav) - Added comment on why the size change also causes resource reallocation (Abhinav) - Dropeed several last "feature" patches, leaving only SSPP reallocation and using 2 SSPPs per plane for now. The rest will be submitted separately. Changes since v3: - Dropped the drm_atomic_helper_check_plane_noscale (Ville) - Reworked the scaling factor according to global value and then check if SSPP has scaler_blk later on. - Split drm_rect_fp_to_int from the rotation-related fix (Abhinav) Changes since v2: - Dropped the encoder-related parts, leave all resource allocation as is (Abhinav) - Significantly reworked the SSPP allocation code - Added debugging code to dump RM state in dri/N/state Changes since v1: - Fixed build error due to me missing one of fixups, it was left uncommitted. - Implementated proper handling of wide plane rotation & reflection. --- Dmitry Baryshkov (3): drm/msm/dpu: add support for virtual planes drm/msm/dpu: allow using two SSPP blocks for a single plane drm/msm/dpu: include SSPP allocation state into the dumped state drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 50 ++++ drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 4 + drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 396 ++++++++++++++++++++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 13 + drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 89 +++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 14 ++ 7 files changed, 498 insertions(+), 78 deletions(-) --- base-commit: 86313a9cd152330c634b25d826a281c6a002eb77 change-id: 20240626-dpu-virtual-wide-beefb746a900 Best regards, -- Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
