On Tue, Dec 03, 2024 at 06:21:29PM +0100, tomm.merciai@xxxxxxxxx wrote: > From: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx> > > Introduce it6263_is_input_bus_fmt_valid() and refactor the > it6263_bridge_atomic_get_input_bus_fmts() function to support VESA > format by selecting the LVDS input format based on the LVDS data mapping > and thereby support both JEIDA and VESA input formats. For the patch itself, Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> A more generic question: is the bridge limited to 4 lanes or does it support 3-lane or 5-lane configurations? > > Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx> > --- > drivers/gpu/drm/bridge/ite-it6263.c | 25 ++++++++++++++++++++++--- > 1 file changed, 22 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/ite-it6263.c b/drivers/gpu/drm/bridge/ite-it6263.c > index cbabd4e20d3e..83d1db29157a 100644 > --- a/drivers/gpu/drm/bridge/ite-it6263.c > +++ b/drivers/gpu/drm/bridge/ite-it6263.c > @@ -48,6 +48,7 @@ > #define REG_COL_DEP GENMASK(1, 0) > #define BIT8 FIELD_PREP(REG_COL_DEP, 1) > #define OUT_MAP BIT(4) > +#define VESA BIT(4) > #define JEIDA 0 > #define REG_DESSC_ENB BIT(6) > #define DMODE BIT(7) > @@ -428,12 +429,30 @@ static inline void it6263_lvds_reset(struct it6263 *it) > fsleep(10000); > } > > +static bool it6263_is_input_bus_fmt_valid(u32 input_fmt) > +{ > + switch (input_fmt) { > + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: > + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: > + return true; > + } > + return false; > +} > + -- With best wishes Dmitry