On 11/11/2024 11:41 PM, Rex Nie wrote:
In pll_get_integloop_gain(), digclk_divsel=1 or 2, base=63 or 196ULL,
so the base may be 63, 126, 196, 392. The condition base <= 2046
always true.
Fixes: caedbf17c48d ("drm/msm: add msm8998 hdmi phy/pll support")
Signed-off-by: Rex Nie <rex.nie@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
