On Thu, Nov 21, 2024 at 03:37:00PM +0000, Dave Stevenson wrote: > On Wed, 23 Oct 2024 at 17:50, Dave Stevenson > <dave.stevenson@xxxxxxxxxxxxxxx> wrote: > > > > This series adds the required DRM, clock, and DT changes > > required to support the display hardware on Pi5. > > There are a couple of minor fixes first before the main patches. > > > > Many of the patches were authored by Maxime whilst working > > for us, however there have been a number of fixes squashed > > into his original patches as issues have been found. I also > > reworked the way UBM allocations are done to avoid double > > buffering of the handles as they are quite a limited resource. > > > > There are 2 variants of the IP. Most Pi5's released to date > > have used the C1 step of the SoC, whilst the 2GB Pi5 released > > in August is using the D0 step, as will other boards in future. > > > > Due to various reasons the register map got reworked between > > the steps, so there is extra code to handle the differences. > > Which step is in use is read out of the hardware, so they > > share a compatible string. > > A gentle ping on the patches for clk-raspberrypi (patches 29-33) and > Broadcom DT (patches 34-36). > > All the DRM and dtbinding ones are reviewed or acked (thank you!). If the bindings and DRM patches are all merged, you can merge these at least. Maxime
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