The single existing GPU (AXE-1-16M) only requires a single power domain. Subsequent patches will add support for BXS-4-64 MC1, which has two power domains. Add infrastructure now to allow for this. Signed-off-by: Matt Coster <matt.coster@xxxxxxxxxx> --- Changes in v2: - Simplified power-domains constraints P3 - Link to v1: https://lore.kernel.org/r/20241105-sets-bxs-4-64-patch-v1-v1-3-4ed30e865892@xxxxxxxxxx --- .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 25 ++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 3b5a5b966585ac29ad104c7aef19881eca73ce80..c629f54c86c441b4cc9e57925f1d65129cbe285b 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -43,8 +43,15 @@ properties: interrupts: maxItems: 1 - power-domains: - maxItems: 1 + power-domains: true + + power-domain-names: + oneOf: + - items: + - const: a + - items: + - const: a + - const: b required: - compatible @@ -52,10 +59,23 @@ required: - clocks - clock-names - interrupts + - power-domains + - power-domain-names additionalProperties: false allOf: + # Cores with a single power domain + - if: + properties: + compatible: + contains: + anyOf: + - const: img,img-axe-1-16m + then: + properties: + power-domains: + maxItems: 1 # Vendor integrations using a single clock domain - if: properties: @@ -81,4 +101,5 @@ examples: clock-names = "core"; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; + power-domain-names = "a"; }; -- 2.47.0
