Re: [PATCH RFC 2/8] drm/msm: adreno: add GMU_BW_VOTE quirk

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On 15/11/2024 16:10, Rob Clark wrote:
On Fri, Nov 15, 2024 at 6:18 AM Dmitry Baryshkov
<dmitry.baryshkov@xxxxxxxxxx> wrote:

On Fri, 15 Nov 2024 at 11:21, Neil Armstrong <neil.armstrong@xxxxxxxxxx> wrote:

On 15/11/2024 08:07, Dmitry Baryshkov wrote:
On Wed, Nov 13, 2024 at 04:48:28PM +0100, Neil Armstrong wrote:
The Adreno GMU Management Unit (GNU) can also scale the DDR Bandwidth
along the Frequency and Power Domain level, but by default we leave the
OPP core vote for the interconnect ddr path.

While scaling via the interconnect path was sufficient, newer GPUs
like the A750 requires specific vote paremeters and bandwidth to
achieve full functionality.

Add a new Quirk enabling DDR Bandwidth vote via GMU.

Please describe, why this is defined as a quirk rather than a proper
platform-level property. From my experience with 6xx and 7xx, all the
platforms need to send some kind of BW data to the GMU.

Well APRIV, CACHED_COHERENT & PREEMPTION are HW features, why this can't be part of this ?

Perhaps the "quirks" bitfield should be features instead ?

Sounds like that.

But LMLOADKILL_DISABLE and TWO_PASS_USE_WFI are quirks.. so it is kind
of a mix of quirks and features.  So meh

Well I can do a split and move the features into a clean .features bitfield, would it be ok ?

Neil


BR,
-R


--
With best wishes
Dmitry




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