Multiple display modes could be read from a display device's EDID. Use clk_round_rate() to validate the "ldb" clock rate for each mode in drm_bridge_funcs::mode_valid() to filter unsupported modes out. Signed-off-by: Liu Ying <victor.liu@xxxxxxx> --- Note that this patch depends on a patch in shawnguo/imx/fixes: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20241017031146.157996-1-marex@xxxxxxx/ v6: * Drop pixel clock rate validation. v5: * No change. v4: * No change. v3: * No change. v2: * Add more comments in fsl-ldb.c and commit message about pixel clock rate validation. (Maxime) drivers/gpu/drm/bridge/fsl-ldb.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/bridge/fsl-ldb.c b/drivers/gpu/drm/bridge/fsl-ldb.c index b559f3e0bef6..d9436ff9ccc3 100644 --- a/drivers/gpu/drm/bridge/fsl-ldb.c +++ b/drivers/gpu/drm/bridge/fsl-ldb.c @@ -270,10 +270,16 @@ fsl_ldb_mode_valid(struct drm_bridge *bridge, const struct drm_display_mode *mode) { struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge); + unsigned long link_freq; if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 160000 : 80000)) return MODE_CLOCK_HIGH; + /* Validate "ldb" clock rate. */ + link_freq = fsl_ldb_link_frequency(fsl_ldb, mode->clock); + if (link_freq != clk_round_rate(fsl_ldb->clk, link_freq)) + return MODE_NOCLOCK; + return MODE_OK; } -- 2.34.1
