On 2024-11-01 14:23, André Almeida wrote: > amdgpu can handle async flips on overlay planes, so allow it for atomic > async checks. > > Signed-off-by: André Almeida <andrealmeid@xxxxxxxxxx> > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > index 495e3cd70426db0182cb2811bc6d5d09f52f8a4b..4c6aed5ca777d76245f5f2865046f0f598be342a 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c > @@ -1266,8 +1266,7 @@ static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane, > struct drm_plane_state *new_plane_state; > struct dm_crtc_state *dm_new_crtc_state; > > - /* Only support async updates on cursor planes. */ > - if (plane->type != DRM_PLANE_TYPE_CURSOR) > + if (plane->type != DRM_PLANE_TYPE_CURSOR && plane->type != DRM_PLANE_TYPE_OVERLAY) This wouldn't just be called for flips, though, but could also be called for updates on a plane, right? Those could cause for problems. There's also nothing special about OVERLAY vs PRIMARY planes, other than that amdgpu needs a PRIMARY plane, IIRC. So updates on PRIMARY planes should also work (or not). Maybe this should check that we're actually dealing with a simple flip, i.e., a simple surface address update. Harry > return -EINVAL; > > new_plane_state = drm_atomic_get_new_plane_state(state, plane); >
