Applied. Thanks! On Sun, Oct 6, 2024 at 7:28 AM Andrew Kreimer <algonell@xxxxxxxxx> wrote: > > Fix typos in comments: "wether -> whether". > > Signed-off-by: Andrew Kreimer <algonell@xxxxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 2 +- > drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++-- > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- > 6 files changed, 9 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > index c544ea2aea6e..87247055a666 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c > @@ -6374,7 +6374,7 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) > WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); > WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & > @@ -6412,7 +6412,7 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) > ring->wptr = 0; > WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr)); > WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); > - /* Set the wb address wether it's enabled or not */ > + /* Set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > index a0f80cc993cf..cf741fc61300 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c > @@ -3557,7 +3557,7 @@ static int gfx_v11_0_cp_gfx_resume(struct amdgpu_device *adev) > WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr)); > WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & > @@ -3595,7 +3595,7 @@ static int gfx_v11_0_cp_gfx_resume(struct amdgpu_device *adev) > ring->wptr = 0; > WREG32_SOC15(GC, 0, regCP_RB1_WPTR, lower_32_bits(ring->wptr)); > WREG32_SOC15(GC, 0, regCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); > - /* Set the wb address wether it's enabled or not */ > + /* Set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > index 63e1a2803503..b5281f45e1ea 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c > @@ -2601,7 +2601,7 @@ static int gfx_v12_0_cp_gfx_resume(struct amdgpu_device *adev) > WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr)); > WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > index 990e7de8da25..ee9ad38e12cd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c > @@ -2559,7 +2559,7 @@ static int gfx_v7_0_cp_gfx_resume(struct amdgpu_device *adev) > ring->wptr = 0; > WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); > @@ -2876,7 +2876,7 @@ static void gfx_v7_0_mqd_init(struct amdgpu_device *adev, > mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; > mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > wb_gpu_addr = ring->rptr_gpu_addr; > mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; > mqd->cp_hqd_pq_rptr_report_addr_hi = > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > index 6864219987e9..9d1672664c7d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > @@ -4260,7 +4260,7 @@ static int gfx_v8_0_cp_gfx_resume(struct amdgpu_device *adev) > ring->wptr = 0; > WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index 99334afb7aae..979774cd2585 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -3357,7 +3357,7 @@ static int gfx_v9_0_cp_gfx_resume(struct amdgpu_device *adev) > WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); > WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); > > - /* set the wb address wether it's enabled or not */ > + /* set the wb address whether it's enabled or not */ > rptr_addr = ring->rptr_gpu_addr; > WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); > WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK); > -- > 2.39.5 >
