Hi,
On 9/27/2024 10:24 PM, Jeffrey Hugo wrote:
> On 9/24/2024 2:17 AM, Jacek Lawrynowicz wrote:
>> @@ -301,7 +308,14 @@ struct vpu_boot_params {
>> u32 temp_sensor_period_ms;
>> /** PLL ratio for efficient clock frequency */
>> u32 pn_freq_pll_ratio;
>> - /** DVFS Mode: Default: 0, Max Performance: 1, On Demand: 2, Power Save: 3 */
>> + /**
>> + * DVFS Mode:
>> + * 0 - Default, DVFS mode selected by the firmware
>> + * 1 - Max Performance
>> + * 2 - On Demand
>> + * 3 - Power Save
>> + * 2 - On Demand Priority Aware
>
> Should this be 4 ?
Yes.
>> + */
>> u32 dvfs_mode;
>> /**
>> * Depending on DVFS Mode:
>
> <snip>
>
>> @@ -130,7 +171,7 @@
>> /*
>> * vpu_jsm_engine_reset_context flag definitions
>> */
>> -#define VPU_ENGINE_RESET_CONTEXT_FLAG_COLLATERAL_DAMAGE_MASK BIT(0)
>> +#define VPU_ENGINE_RESET_CONTEXT_FLAG_COLLATERAL_DAMAGE_MASK BIT(1)
>
> This feels like a bug fix. How can this be a FW API update without backwards compatibility?
>
>> #define VPU_ENGINE_RESET_CONTEXT_HANG_PRIMARY_CAUSE 0
>> #define VPU_ENGINE_RESET_CONTEXT_COLLATERAL_DAMAGE 1
>>
This is actually a bug. Thanks for noticing.
