Re: [PATCH v4 3/3] arm64: dts: mediatek: mt8186: Add svs node

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On 30/08/2024 10:45, Rohit Agarwal wrote:
Add clock/irq/efuse setting in svs nodes for mt8186 SoC.

Signed-off-by: Rohit Agarwal <rohiagar@xxxxxxxxxxxx>

Applied, thanks

---
  arch/arm64/boot/dts/mediatek/mt8186.dtsi | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 85b77ec033c1..3bd023cdcac0 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1372,6 +1372,18 @@ lvts: thermal-sensor@1100b000 {
  			#thermal-sensor-cells = <1>;
  		};
+ svs: svs@1100bc00 {
+			compatible = "mediatek,mt8186-svs";
+			reg = <0 0x1100bc00 0 0x400>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+			clock-names = "main";
+			nvmem-cells = <&svs_calibration>, <&lvts_efuse_data1>;
+			nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
+			resets = <&infracfg_ao MT8186_INFRA_PTP_CTRL_RST>;
+			reset-names = "svs_rst";
+		};
+
  		pwm0: pwm@1100e000 {
  			compatible = "mediatek,mt8186-disp-pwm", "mediatek,mt8183-disp-pwm";
  			reg = <0 0x1100e000 0 0x1000>;
@@ -1695,6 +1707,10 @@ lvts_efuse_data2: lvts2-calib@2f8 {
  				reg = <0x2f8 0x14>;
  			};
+ svs_calibration: calib@550 {
+				reg = <0x550 0x50>;
+			};
+
  			gpu_speedbin: gpu-speedbin@59c {
  				reg = <0x59c 0x4>;
  				bits = <0 3>;



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