DPU supports a single writeback session running concurrently with primary display when the CWB mux is configured properly. This series enables clone mode for DPU driver and adds support for programming the CWB mux in cases where the hardware has dedicated CWB pingpong blocks. Currently, the CWB hardware blocks have only been added to the SM8650 hardware catalog. This changes are split into two parts: The first part of the series will pull in Dmitry's patches to refactor the DPU resource manager to be based off of CRTC instead of encoder. This includes some changes (noted in the relevant commits) by me and Abhinav to fix some issues with getting the global state and refactoring the CDM allocation to work with Dmitry's changes. The second part of the series will add support for CWB by doing the following: 1) Add a DRM helper to detect if the current CRTC state is in clone mode and add an "in_clone_mode" entry to the atomic state print 2) Add the CWB mux to the hardware catalog and clarify the pingpong block index enum to specifiy which pingpong blocks are dedicated to CWB only and which ones are general use pingpong blocks 3) Add CWB as part of the devcoredump 4) Add support for configuring the CWB mux via dpu_hw_wb ops 5) Add pending flush support for CWB 6) Add support for validating clone mode in the DPU CRTC and setting up CWB within the encoder 7) Adjust the encoder trigger flush, trigger start, and kickoff order to accomodate clone mode 8) Adjust when the frame done timer is started for clone mode 9) Define the possible clones for DPU encoders so that The feature was tested on SM8650 using IGT's kms_writeback test with the following change [1] and dumping the writeback framebuffer when in clone mode. I haven't gotten the chance to test it on DP yet, but I've validated both single and dual LM on DSI. To test CWB with IGT, you'll need to apply this series [1] and run the following command: IGT_FRAME_DUMP_PATH=<dump path> FRAME_PNG_FILE_NAME=<file name> \ ./build/tests/kms_writeback [--run-subtest dump-valid-clones] \ -dc <primary display mode> [1] https://patchwork.freedesktop.org/series/137933/ --- Dmitry Baryshkov (4): drm/msm/dpu: get rid of struct dpu_rm_requirements drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation drm/msm/dpu: move resource allocation to CRTC drm/msm/dpu: fill CRTC resources in dpu_crtc.c Esha Bharadwaj (3): drm/msm/dpu: add CWB entry to catalog for SM8650 drm/msm/dpu: add devcoredumps for cwb registers drm/msm/dpu: add CWB support to dpu_hw_wb Jessica Zhang (14): drm: add clone mode check for CRTC drm: print clone mode status in atomic state drm/msm/dpu: Check CRTC encoders are valid clones drm/msm/dpu: Add RM support for allocating CWB drm/msm/dpu: Add CWB to msm_display_topology drm/msm/dpu: Require modeset if clone mode status changes drm/msm/dpu: Reserve resources for CWB drm/msm/dpu: Configure CWB in writeback encoder drm/msm/dpu: Program hw_ctl to support CWB drm/msm/dpu: Adjust writeback phys encoder setup for CWB drm/msm/dpu: Start frame done timer after encoder kickoff drm/msm/dpu: Skip trigger flush and start for CWB drm/msm/dpu: Reorder encoder kickoff for CWB drm/msm/dpu: Set possible clones for all encoders drivers/gpu/drm/drm_atomic.c | 1 + .../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h | 29 +- .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 4 +- .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 4 +- .../drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 253 ++++++++++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 358 ++++++++++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 36 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 18 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 67 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 13 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 30 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 14 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 14 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 69 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h | 34 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 12 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 12 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 351 ++++++++++++-------- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 14 +- drivers/gpu/drm/msm/msm_drv.h | 2 + include/drm/drm_crtc.h | 7 + 22 files changed, 994 insertions(+), 352 deletions(-) --- base-commit: dd482072df04d3c2bb180fc860b0ed0d3c99bdd4 change-id: 20240618-concurrent-wb-97d62387f952 Best regards, -- Jessica Zhang <quic_jesszhan@xxxxxxxxxxx>
