On Wed, 28 Aug 2024 at 22:05, Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx> wrote: > > > > On 6/26/2024 2:46 PM, Dmitry Baryshkov wrote: > > Move a call to dpu_plane_check_inline_rotation() to the > > dpu_plane_atomic_check_pipe() function, so that the rot90 constraints > > are checked for both pipes. Also move rotation field from struct > > dpu_plane_state to struct dpu_sw_pipe_cfg. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++ > > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 55 +++++++++++++++-------------- > > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 -- > > 3 files changed, 31 insertions(+), 28 deletions(-) > > > > Change LGTM and addresses one of the questions I had in the prev patch. > > One question though, till patch 11 which adds support for 2 different > SSPPs for the plane this change is not necessary right? Because till > that change we assign the same SSPP OR two rectangles of the same SSPP > so we dont need a per pipe_cfg check till then because both the > pipe_cfgs point to the same SSPP. > > What is your thought on squashing this with patch 11 because from a > logical split PoV, this change is meaningful only after that. I'd say patch 11 is complicated enough. I'll check if I can change the order of patches 09 and 10 to make it more obvious. -- With best wishes Dmitry
