On Wed, Jul 24, 2024 at 05:29:35PM +0800, Liu Ying wrote: > i.MX8qxp Display Controller pixel engine consists of all processing units > that operate in the AXI bus clock domain. Command sequencer and interrupt > controller of the Display Controller work with AXI bus clock, but they are > not in pixel engine. > > Signed-off-by: Liu Ying <victor.liu@xxxxxxx> > --- > v3: > * No change. > > v2: > * Drop fsl,dc-*-id DT properties from example. (Krzysztof) > * Fix register range sizes in example. > > .../imx/fsl,imx8qxp-dc-pixel-engine.yaml | 250 ++++++++++++++++++ > 1 file changed, 250 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
