Hi, > with more and more patches for TC9595 support got meged into linux-next, > only a few remain on my patch stack. > > This is one of them and is necessary for DP support: > Tested-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> As mentioned in [1] I expect a new version of this series with a proper documentation update that will then (hopefully) be acked by the maintainers. Apart from that, I'm still not convinced that the .attach() callback is the correct place to put the lanes into LP-11 mode. E.g. the MediaTek DSI host needs to already know the HS clock rate before configuring the D-PHY. Something which isn't available at the time .attach() is called. Marek mentioned, that one should start with lowest possible clock rate and later reconfigure it to the correct rate. I'm not sure this is possible without taking the clock lanes out of LP-11 mode again (i.e. disabling the PHY altogether to change its PLL). But doing so will violate the bridge requirements again. -michael [1] https://lore.kernel.org/dri-devel/D2R83VFPUWE3.3MBX3LQOCDFWA@xxxxxxxxxx/
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