17.09.2013, в 18:24, Alex Deucher <alexdeucher@xxxxxxxxx> написал(а): > On Tue, Sep 17, 2013 at 5:23 AM, Alex Ivanov <gnidorah@xxxxxxxxx> wrote: >> Alex, >> >> 10.09.2013, в 16:37, Alex Deucher <alexdeucher@xxxxxxxxx> написал(а): >> >>> The dummy page isn't really going to help much. That page is just >>> used as a safety placeholder for gart entries that aren't mapped on >>> the GPU. TTM (drivers/gpu/drm/ttm) actually does the allocation of >>> the backing pages for the gart. >> >>> You may want to look there. >> >> Ah, sorry. Indeed. Though, my idea with: >> >> On Tue, Sep 10, 2013 at 5:20 AM, Alex Ivanov <gnidorah@xxxxxxxxx> wrote: >> >>> Thanks! I'll try. Meanwhile i've tried a switch from page_alloc() to >>> dma_alloc_coherent() in radeon_dummy_page_*(), which didn't help :( >> >> doesn't make a sense at TTM part as well. > > After the driver is loaded, you can dump some info from debugfs: > r100_rbbm_info > r100_cp_ring_info > r100_cp_csq_fifo > Which will dump a bunch of registers and internal fifos so we can see > that the chip actually processed. > > Alex Reading of r100_cp_ring_info leads to a KP: r100_debugfs_cp_ring_info(): count = (rdp + ring->ring_size - wdp) & ring->ptr_mask; i = (rdp + j) & ring->ptr_mask; for (j = 0; j <= count; j++) { i = (rdp + j) & ring->ptr_mask; --> Here at first iteration <-- --> count = 262080, i = 0 <-- seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); } Reading of radeon_ring_gfx (which i've additionally tried to read) throws an MCE: radeon_debugfs_ring_info(): count = (ring->ring_size / 4) - ring->ring_free_dw; i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; for (j = 0; j <= (count + 32); j++) { --> Here at first iteration <-- --> i = 262112, j = 0 <-- seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); i = (i + 1) & ring->ptr_mask; } I'm attaching debug outputs on kernel built with these loops commented.
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drm_parisc_debug.tgz
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