Alex, 10.09.2013, в 16:37, Alex Deucher <alexdeucher@xxxxxxxxx> написал(а): > The dummy page isn't really going to help much. That page is just > used as a safety placeholder for gart entries that aren't mapped on > the GPU. TTM (drivers/gpu/drm/ttm) actually does the allocation of > the backing pages for the gart. > You may want to look there. Ah, sorry. Indeed. Though, my idea with: On Tue, Sep 10, 2013 at 5:20 AM, Alex Ivanov <gnidorah@xxxxxxxxx> wrote: > Thanks! I'll try. Meanwhile i've tried a switch from page_alloc() to > dma_alloc_coherent() in radeon_dummy_page_*(), which didn't help :( doesn't make a sense at TTM part as well. Konrad, 10.09.2013, 17:25, "Konrad Rzeszutek Wilk" <konrad.wilk@xxxxxxxxxx>: > > Is this platform enabling the SWIOTLB layer? Doesn't look like. > The reason I am asking is > b/c if you do indeed enable it you end up using the TTM DMA pool > which allocates pages using the dma_alloc_coherent - which means that > all of the pages that come out of TTM are already 'DMA' mapped. > > And that means the radeon_gart_bind and all its friends > use the DMA addresses that have been constructed by SWIOTLB IOMMU. > > Perhaps the PA-RISC IOMMU creates the DMA addresses differently? > > When the card gets programmed, you do end up using ttm_agp_bind right? > I am wondering if something like this: > > https://lkml.org/lkml/2010/12/6/512 > > is needed to pass in the right DMA address? No idea how to modify ttm_agp_bind() this way, though doesn't matter if swiotlb isn't used anyway? _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
