On Thu, Jun 20, 2024 at 12:12:27PM GMT, Abhinav Kumar wrote:
> clear_pending_flush() ctl op is always assigned irrespective of the DPU
> hardware revision. Hence there is no needed to check whether the op has
> been assigned before calling it.
>
> Drop the checks across the driver for clear_pending_flush() and also
> update its documentation that it is always expected to be assigned.
>
> changes in v2:
> - instead of adding more validity checks just drop the one for clear_pending_flush
> - update the documentation for clear_pending_flush() ctl op
> - update the commit text reflecting these changes
>
> Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback")
> Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> Closes: https://lore.kernel.org/all/464fbd84-0d1c-43c3-a40b-31656ac06456@moroto.mountain/T/
> Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 3 +--
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 4 +++-
> 3 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> index ef56280bea93..6f8c7ffa2d27 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
> @@ -83,7 +83,9 @@ struct dpu_hw_ctl_ops {
>
> /**
> * Clear the value of the cached pending_flush_mask
> - * No effect on hardware
> + * No effect on hardware. This ctl op is always assigned
> + * irrespective of hw version and hence no check is needed
> + * for the callers to check its availability before calling it.
A simple 'Required to be imlemented' or just 'Required' should be enough.
> * @ctx : ctl path ctx pointer
> */
> void (*clear_pending_flush)(struct dpu_hw_ctl *ctx);
> --
> 2.44.0
>
--
With best wishes
Dmitry
