On Tue, Jun 18, 2024 at 04:59:36PM GMT, Dzmitry Sankouski wrote: > sdm845 has "General Purpose" clocks that can be muxed to > SoC pins. > > Those clocks may be used as e.g. PWM sources for external peripherals. > Add more frequencies to the table for those clocks so it's possible > for arbitrary peripherals to make use of them. > > See also: bf8bb8eaccf(clk: qcom: gcc-msm8916: Add rates to the GP clocks) Each time I look at the table attached to the GP CLK, I feel that it's plain wrong. In the end the GPCLK can in theory have arbitrary value depending on the usecase. Bjorn, Konrad, maybe we should add special clk_ops for GP CLK which allow more flexibility than a default clk_rcg2_ops? > > Signed-off-by: Dzmitry Sankouski <dsankouski@xxxxxxxxx> > --- > drivers/clk/qcom/gcc-sdm845.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-sdm845.c b/drivers/clk/qcom/gcc-sdm845.c > index ea4c3bf4fb9b..0efd3364e8f5 100644 > --- a/drivers/clk/qcom/gcc-sdm845.c > +++ b/drivers/clk/qcom/gcc-sdm845.c > @@ -283,7 +283,21 @@ static struct clk_rcg2 gcc_sdm670_cpuss_rbcpr_clk_src = { > }, > }; > > +/* > + * This is a frequency table for "General Purpose" clocks. > + * These clocks can be muxed to the SoC pins and may be used by > + * external devices. They're often used as PWM source. > + * > + * See comment in gcc-mam8916.c at ftbl_gcc_gp1_3_clk. > + */ > static const struct freq_tbl ftbl_gcc_gp1_clk_src[] = { > + F(10000, P_BI_TCXO, 16, 1, 120), > + F(20000, P_BI_TCXO, 16, 1, 60), > + F(100000, P_BI_TCXO, 16, 1, 12), > + F(500000, P_GPLL0_OUT_EVEN, 12, 1, 100), > + F(1000000, P_GPLL0_OUT_EVEN, 12, 1, 50), > + F(2500000, P_GPLL0_OUT_EVEN, 12, 1, 10), > + F(5000000, P_GPLL0_OUT_EVEN, 12, 1, 5), > F(19200000, P_BI_TCXO, 1, 0, 0), > F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0), > F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), > > -- > 2.39.2 > -- With best wishes Dmitry