BTW is there any operation that could be taken to examine this specific workaround? Is there any case possible to reproduce?
No idea, I mean that's for GFX7/8 which was released between 2013 and 2017.
My educated guess is that you could create a test where you write something to VRAM or GTT with a shader and than in the interrupt handler try to observer if you can see those values with the CPU.
If those values aren't visible with the CPU then you have either a cache flushing issue or your CPU and/or PCIe root complex is incorrectly reordering writes and interrupts.
Regards,
Christian.
