Hi, There is existing mainline support for the DE2 and DE3 AllWinner display pipeline IP blocks, used in the A64 and H6 among others, however the H700 (as well as the H616/H618 and the T507 automotive SoC) have a newer version of the Display Engine (v3.3/DE33) which adds additional high-resolution support as well as YUV colour formats and AFBC compression support. The Anbernic RG35XX (-2024, -Plus -H, -SP) variants are handheld gaming devices based on the H700 SoC. They all have a 3.5" RGB LCD display (WL-355608-A8) with an NV3052 (or clone) RAM-less driver IC, with a patch currently in drm-misc-next [1], as well as a DesignWare HDMI 2.0 output. A linked series of patches is intended to add support for the RG35XX LCD display, but will do so in several steps, touching various subsystems. This patch set adds DE33 support: 1. Refactor the existing DE2/DE3 code to support mulitple colour formats. 2. Add YUV420 colour format support in the DE3 driver. 3. Add Arm Frame Buffer Compression (AFBC) support to the DE3 driver. This is currently only supported for VI layers (for HW-decoded video output) but is well integrated into these changes and a subsequent patchset to enable the Video Engine is planned. 4. Extend the DE2/3 driver for the DE33. A subsequent patch set will enable H616 and RG35XX support: 5. Add DT bindings and clock support for the additional LCD timing controller. 6. Add H616 DT changes to enable a required SRAM allocation, display engine, timing controllers (TCONs) and RGB and LVDS pins to the H616 DTSI. 7. Add the required DT nodes for the DE, TCON and LCD panel to the RG35XX device tree. Further patchsets to enable HDMI support for this device (and the other H616 and H618 boards like the Orange Pi Zero 3) is planned, as is support for the IOMMU and video engine, and u-boot support for the panel and display pipeline. This DE and forthcoming LCD and HDMI patches are a refactoring of work by Jernej Skrabec, currently out-of-tree [2]. Regards, Ryan [1] https://lore.kernel.org/dri-devel/171740437725.4156184.17662886246928360602.b4-ty@xxxxxxxxxx/ [2] https://github.com/jernejsk/linux-1/tree/okt507c Jernej Skrabec (4): drm: sun4i: de2/de3: Change CSC argument drm/sun4i: de2/de3: Merge CSC functions into one drm/sun4i: de2/de3: call csc setup also for UI layer drm/sun4i: de2: Initialize layer fields earlier Ryan Walklin (4): dt-bindings: bus: allwinner: add H616 DE33 bindings drm/sun4i: de3: Add support for YUV420 output drm/sun4i: de3: Implement AFBC support drm: sun4i: add Display Engine 3.3 (DE33) support .../bus/allwinner,sun50i-a64-de2.yaml | 1 + .../clock/allwinner,sun8i-a83t-de2-clk.yaml | 1 + .../allwinner,sun8i-a83t-de2-mixer.yaml | 1 + drivers/clk/sunxi-ng/Makefile | 2 +- drivers/clk/sunxi-ng/sun8i-de33.c | 185 ++++++++++ drivers/clk/sunxi-ng/sun8i-de33.h | 19 + drivers/gpu/drm/drm_atomic_state_helper.c | 7 + drivers/gpu/drm/sun4i/Makefile | 3 +- drivers/gpu/drm/sun4i/sun4i_tcon.c | 30 +- drivers/gpu/drm/sun4i/sun4i_tcon.h | 1 + drivers/gpu/drm/sun4i/sun50i_afbc.c | 250 +++++++++++++ drivers/gpu/drm/sun4i/sun50i_afbc.h | 87 +++++ drivers/gpu/drm/sun4i/sun50i_fmt.c | 99 +++++ drivers/gpu/drm/sun4i/sun50i_fmt.h | 33 ++ drivers/gpu/drm/sun4i/sun8i_csc.c | 341 +++++++++++++++--- drivers/gpu/drm/sun4i/sun8i_csc.h | 20 +- drivers/gpu/drm/sun4i/sun8i_mixer.c | 253 ++++++++++--- drivers/gpu/drm/sun4i/sun8i_mixer.h | 33 +- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 49 ++- drivers/gpu/drm/sun4i/sun8i_ui_scaler.c | 2 +- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 141 +++++--- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 115 ++++-- drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 3 +- drivers/gpu/drm/sun4i/sunxi_engine.h | 34 ++ 24 files changed, 1501 insertions(+), 209 deletions(-) create mode 100644 drivers/clk/sunxi-ng/sun8i-de33.c create mode 100644 drivers/clk/sunxi-ng/sun8i-de33.h create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.c create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.h create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.c create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.h -- 2.45.2
