On 16/05/24 13:41, Maxime Ripard wrote: > On Sat, May 11, 2024 at 09:00:46PM +0530, Aradhya Bhatia wrote: >> Update the Phy initialized state to "not initialized" when the driver >> (and the hardware by extension) gets suspended. This will allow the Phy >> to get initialized again after resume. >> >> Fix the OF node that gets passed to find the next available bridge in >> the display pipeline. >> >> Fix the order of DSI Link and DSI Phy inits. The link init needs to >> happen before the Phy is initialized, so the Phy can lock on the >> incoming PLL reference clock. If this doesn't happen, the Phy cannot >> lock (until DSI Link is init later on). This causes a warning dump >> during the kernel boot. >> >> Allow the D-Phy config checks to use mode->clock instead of >> mode->crtc_clock during mode_valid checks, like everywhere else in the >> driver. > > All these should be in separate patches. > Alright! I will split them into different patches in v2. Regards Aradhya
