2013/8/14 Alex Deucher <alexdeucher@xxxxxxxxx>:
> + /* program the speaker allocation */
> + tmp = RREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);
> + tmp &= ~(DP_CONNECTION | SPEAKER_ALLOCATION_MASK);
> + /* set HDMI mode */
> + tmp |= HDMI_CONNECTION;
> + if (sadb_count)
> + tmp |= SPEAKER_ALLOCATION(sadb[0]);
> + else
> + tmp |= SPEAKER_ALLOCATION(5); /* stereo */
> + WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp);
> +
> + for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) {
> + u32 value = 0;
> + int j;
> +
> + for (j = 0; j < sad_count; j++) {
> + struct cea_sad *sad = &sads[j];
> +
> + if (sad->format == eld_reg_to_type[i][1]) {
> + value = MAX_CHANNELS(sad->channels) |
> + DESCRIPTOR_BYTE_2(sad->byte2) |
> + SUPPORTED_FREQUENCIES(sad->freq);
> + if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM)
> + value |= SUPPORTED_FREQUENCIES_STEREO(sad->freq);
> + break;
> + }
> + }
> + WREG32_ENDPOINT(offset, eld_reg_to_type[i][0], value);
> + }
I hope this is my last questions I'm bothering you with... This is how
fglrx does that part:
WREG32(0x00005e00, 0x00000125); PIN_CONTROL_CHANNEL_SPEAKER
WREG32(0x00005e04, 0x00c1005f); PIN_CONTROL_CHANNEL_SPEAKER
RREG32(0x000..05c); -> 0x00000000 AFMT_AUDIO_PACKET_CONTROL2
WREG32(0x000..05c, 0x0000ff00); AFMT_AUDIO_PACKET_CONTROL2
WREG32(0x00005e00, 0x00000027); 0x27 was 0x00005f80 on Evergreen
RREG32(0x00005e04); -> 0x00000000 0x27 was 0x00005f80 on Evergreen
WREG32(0x00005e00, 0x00000127); 0x27 was 0x00005f80
WREG32(0x00005e04, 0x00000040); 0x27 was 0x00005f80
WREG32(0x00005e00, 0x000c3128); DESCRIPTOR0
WREG32(0x00005e04, 0x7f077f07); DESCRIPTOR0
The difference is that between setting PIN_CONTROL_CHANNEL_SPEAKER and
DESCRIPTOR0 fglrx enables audio channels (see
AFMT_AUDIO_PACKET_CONTROL2 and 0xff00).
Do you think it does matter? Or can we ignore the order and do it your way?
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/dri-devel
