On Fri, Feb 09, 2024 at 11:08:22AM +0100, Guido Günther wrote: > Hi Ao, > > this doesn't say why that was changed but your cover letter > has that information: > > > After correcting these parameters by referencing the > > device tree in JELOS (which uses the BSP kernel for RK3566), the panel > > started to work properly. > > Can you add that to the commit message and maybe add an URL as > reference please? > > I've added Chris to the cc: list. He submitted the original rg353v2 > and we don't want to break other devices. Chris, do you have any means > to check these values? I checked. I'm not sure exactly how but when I fired up the most recent kernel this panel appeared to have problems with the init sequence as defined. After making the changes from this patch series it seems to be back to normal. So these changes appear to be needed for existing devices, and I'm not sure what could have caused the regression... Note the previous settings did still appear to work, the panel just took much longer to start working after the init sequence (as much as 20 seconds on cold boot, clearly indicating a problem). Thank you for the fix! Tested-by: Chris Morgan <macromorgan@xxxxxxxxxxx> > > Cheers, > -- Guido > > On Sun, Jan 28, 2024 at 03:10:48AM +0100, Ao Zhong wrote: > > This patch resolves the issue with the panel initialization of the > > Anbernic RG353V-V2 caused by incorrect parameters. > > > > Signed-off-by: Ao Zhong <hacc1225@xxxxxxxxx> > > --- > > drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c > > index b55bafd1a8be..a346d6c3d283 100644 > > --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c > > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c > > @@ -357,8 +357,8 @@ static int rg353v2_init_sequence(struct st7703 *ctx) > > 0x28, 0x03, 0xff, 0x00, 0x00, 0x00, 0x00); > > mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); > > mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x0a, 0x0a); > > - mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x92, 0x92); > > - mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x25, 0x22, > > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x7f, 0x7f); > > + mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, 0x26, 0x62, > > 0xf0, 0x63); > > mipi_dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, 0x33, 0x81, 0x05, > > 0xf9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00, > > -- > > 2.43.0 > >
