On 06/02/2024 16:53, AngeloGioacchino Del Regno wrote:
#define DSI_PSCTRL 0x1c -#define DSI_PS_WC 0x3fff -#define DSI_PS_SEL (3 << 16) +#define DSI_PS_WC GENMASK(14, 0) +#define DSI_PS_SEL GENMASK(19, 16)0011 0000 0000 0000 0000 => GENMASK(17, 16)Alexandre, the reason for that is in the commit description :-P "While at it, also fix the DSI_PS_SEL mask to include all bits instead of just a subset of them."
Oh sorry... Reviewed-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx> -- Regards, Alexandre