On Wed, Jan 24, 2024 at 07:27:58AM -0800, Yury Norov wrote:
On Wed, Jan 24, 2024 at 08:03:53AM -0600, Lucas De Marchi wrote:On Wed, Jan 24, 2024 at 09:58:26AM +0200, Jani Nikula wrote: > On Tue, 23 Jan 2024, Lucas De Marchi <lucas.demarchi@xxxxxxxxx> wrote: > > From: Yury Norov <yury.norov@xxxxxxxxx> > > > > Generalize __GENMASK() to support different types, and implement > > fixed-types versions of GENMASK() based on it. The fixed-type version > > allows more strict checks to the min/max values accepted, which is > > useful for defining registers like implemented by i915 and xe drivers > > with their REG_GENMASK*() macros. > > Mmh, the commit message says the fixed-type version allows more strict > checks, but none are actually added. GENMASK_INPUT_CHECK() remains the > same. > > Compared to the i915 and xe versions, this is more lax now. You could > specify GENMASK_U32(63,32) without complaints. Doing this on top of the this series: -#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(30, 27) +#define XELPDP_PORT_M2P_COMMAND_TYPE_MASK REG_GENMASK(62, 32) and I do get a build failure: ../drivers/gpu/drm/i915/display/intel_cx0_phy.c: In function ‘__intel_cx0_read_once’: ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow] 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \ | ^~I would better include this in commit message to avoid people's confusion. If it comes to v2, can you please do it and mention that this trick relies on shift-count-overflow compiler check?
either that or an explicit check as it was suggested. What's your preference? Lucas De Marchi
Thanks, Yury
