Add "st,stm32-lvds" compatible. Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@xxxxxxxxxxx> --- Changes in v2: - Switch compatible and clock-cells related areas - Remove faulty #include in the example. - Add entry in MAINTAINERS --- .../bindings/display/st,stm32-lvds.yaml | 117 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 118 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/st,stm32-lvds.yaml diff --git a/Documentation/devicetree/bindings/display/st,stm32-lvds.yaml b/Documentation/devicetree/bindings/display/st,stm32-lvds.yaml new file mode 100644 index 000000000000..8dfc6e88f260 --- /dev/null +++ b/Documentation/devicetree/bindings/display/st,stm32-lvds.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/st,stm32-lvds.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 LVDS Display Interface Transmitter + +maintainers: + - Raphael Gallais-Pou <raphael.gallais-pou@xxxxxxxxxxx> + - Yannick Fertre <yannick.fertre@xxxxxxxxxxx> + +description: | + The STMicroelectronics STM32 LVDS Display Interface Transmitter handles the + LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC) + onto the LVDS PHY. + + It regroups three sub blocks: + - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input + pixels onto the data lanes of the PHY + - LVDS PHY: parallelize the data and drives the LVDS data lanes + - LVDS wrapper: handles top-level settings + + The LVDS controller driver supports the following high-level features: + - FDP-Link-I and OpenLDI (v0.95) protocols + - Single-Link or Dual-Link operation + - Single-Display or Double-Display (with the same content duplicated on both) + - Flexible Bit-Mapping, including JEIDA and VESA + - RGB888 or RGB666 output + - Synchronous design, with one input pixel per clock cycle + +properties: + compatible: + const: st,stm32-lvds + + "#clock-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + items: + - description: APB peripheral clock + - description: Reference clock for the internal PLL + + clock-names: + items: + - const: pclk + - const: ref + + resets: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: | + LVDS input port node, connected to the LTDC RGB output port. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: | + LVDS output port node, connected to a panel or bridge input port. + + required: + - port@0 + - port@1 + +required: + - compatible + - "#clock-cells" + - reg + - clocks + - clock-names + - resets + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32mp25-clks.h> + #include <dt-bindings/reset/stm32mp25-resets.h> + + lvds: lvds@48060000 { + compatible = "st,stm32-lvds"; + reg = <0x48060000 0x2000>; + #clock-cells = <0>; + clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>; + clock-names = "pclk", "ref"; + resets = <&rcc LVDS_R>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lvds_in: endpoint { + remote-endpoint = <<dc_ep1_out>; + }; + }; + + port@1 { + reg = <1>; + lvds_out0: endpoint { + remote-endpoint = <&lvds_panel_in>; + }; + }; + }; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 9d959a6881f7..0b6ec5347195 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7193,6 +7193,7 @@ L: dri-devel@xxxxxxxxxxxxxxxxxxxxx S: Maintained T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml +F: Documentation/devicetree/bindings/display/st,stm32-lvds.yaml F: drivers/gpu/drm/stm DRM DRIVERS FOR TI KEYSTONE -- 2.25.1
