On Tue, 12 Dec 2023 at 02:03, Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx> wrote: > > > On 12/11/2023 1:30 PM, Dmitry Baryshkov wrote: > > On Mon, 11 Dec 2023 at 20:38, Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx> wrote: > >> A DCE (Display Compression Engine) contains two DSC hard slice > >> encoders. Each DCE start with even DSC encoder index followed by > > "starts". But it will not be correct. The DCE doesn't start with the > > DSC encoder. DCE consists of two DSC encoders, one has an odd index > > and another one has an even index. > > > >> an odd DSC encoder index. Each encoder can work independently. > >> But Only two DSC encoders from same DCE can be paired to work > > only > > > >> together to support merge mode. In addition, the DSC with even > > There are different merge modes. Here you are talking about the DSC merge mode. > > > >> index have to mapping to even pingpong index and DSC with odd > > PINGPONG (end everywhere else). > > > > have to be mapped, should be used, etc. > > > >> index have to mapping to odd pingpong index at its data path. > >> This patch improve DSC allocation mechanism with consideration > > improves > > > >> of above factors. > > of these factors. > > > >> Changes in V3: > >> -- add dpu_rm_pingpong_dsc_check() > >> -- for pair allocation use i += 2 at for loop > >> > >> Changes in V2: > >> -- split _dpu_rm_reserve_dsc() into _dpu_rm_reserve_dsc_single() and > >> _dpu_rm_reserve_dsc_pair() > >> > >> Fixes: f2803ee91a41 ("drm/msm/disp/dpu1: Add DSC support in RM") > > This tag is incorrect. The patch should be split into two pieces. One > > which fixes DSC allocation for DSC 1.1 encoders, where there were no > > DCE blocks, another one which adds proper handling for DCE. > > Unless the paired allocation requirement also applies to pre-DCE DSC > > encoders. But in that case the commit message doesn't make any sense. > > > > I checked 4.x Qualcomm kernels. None of them contained any of these > > restrictions for DSC blocks. Only the displaypack targeting 4.19 > > kernel got these changes. But it predates DCE pairs support. > > as I said earlier the rule of odd/even pp-index map to odd/even > dsc-index is there since dsc v1.1. > > I think current code (including down stream code) works by luck to not > encounter a configuration with two independence paths, one with single > dsc and the other one use two dsc to support dsc merge mode. > > this patch is the fix to enforce this rule for both dsc v1.1 and v1.2 > and I will rework commit message yo have better description. Good. Does this apply to paired allocation too? I think so, as the techpack first got the paired allocation and only afterwards it has got the DSC/PP idx check. Regarding the patch itself. May I suggest an alternative approach, which should work better, I think. At least it will not require 'deleting' the PP indices. First you preprocess the pp_to_enc_id array and list all PP indices selected for this encoder. Then you work with this array, matching PP and DSC blocks. -- With best wishes Dmitry