Hi, On Sat, Sep 30, 2023 at 4:41 AM Douglas Cooper <douglas.cooper1@xxxxxxxxx> wrote: > > Hi Doug > > That’s really good feedback. Thanks so much for taking the time to outline that. I’ll keep investigating and dig into those areas you mentioned. > > I should have mentioned I’m also using the chip in conjunction with a full size dp connector which appears to be supported. Also, besides the pll not locking I’m seeing an issue with the chip reporting there is no display connected when it reads the SN_HPD_DISABLE_REG in the ti_sn_bridge_detect function. This seems bizarre considering it reports accurately when I remove the module and i2cget the value. I was thinking this could be a false negative if the driver is actively trying to configure it and it’s failing. Any chance that the disabling of HPD in ti_sn65dsi86_enable_comms() is messing you up? Do you need to avoid doing that in the case of a full sized DP? I've never tried to use it with a full size DP connector, though I think others have made it work. One thing to note is that when using sn65dsi86 as a full sized DP the code currently disables the "scrambler". If you still have control over the hardware, it seems like it's supposed to be better to pull up the "TEST2" pin and then add code to the driver to properly enable the right scrambler for DP. -Doug
