On Thu, 31 Aug 2023 at 01:49, Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx> wrote:
>
> For YUV cases, setting the required format bits was missed
> out in the register programming. Lets fix it now in preparation
> of adding YUV formats support for writeback.
>
> Fixes: 84a33d0fd921 ("drm/msm/dpu: add dpu_hw_wb abstraction for writeback blocks")
Since we were not exporting YUV formats, this tag is not correct. This
is a mere functional change, not a fix.
> Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> index ebc416400382..0aa598b355e9 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
> @@ -86,6 +86,9 @@ static void dpu_hw_wb_setup_format(struct dpu_hw_wb *ctx,
> dst_format |= BIT(14); /* DST_ALPHA_X */
> }
>
> + if (DPU_FORMAT_IS_YUV(fmt))
> + dst_format |= BIT(15);
> +
> pattern = (fmt->element[3] << 24) |
> (fmt->element[2] << 16) |
> (fmt->element[1] << 8) |
> --
> 2.40.1
>
--
With best wishes
Dmitry
