From: Chaitanya Kumar Borah <chaitanya.kumar.borah@xxxxxxxxx>
Add supported plane color pipelines. To represent all
hardware blocks in their inactive state, we introduce a pipeline
called "no color pipeline" which is the default pipeline.
Add respective color pipelines for SDR and HDR planes. Create and
attach plane enum property "GET_COLOR_PIPELINE" to expose these
pipelines to userspace.
Co-developed-by: Uma Shankar <uma.shankar@xxxxxxxxx>
Signed-off-by: Uma Shankar <uma.shankar@xxxxxxxxx>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_color.c | 31 +++++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_color.h | 3 ++-
2 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index a8c6be70c859..9f5d2cd0f97a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3977,7 +3977,6 @@ struct drm_color_op color_pipeline_hdr[] = {
},
};
-__maybe_unused
static int intel_prepare_plane_color_pipeline(struct drm_plane *plane)
{
struct drm_i915_private *i915 = to_i915(plane->dev);
@@ -4039,6 +4038,36 @@ static int intel_prepare_plane_color_pipeline(struct drm_plane *plane)
return ret;
};
+__maybe_unused
+void intel_color_plane_init(struct drm_plane *plane)
+{
+ struct drm_i915_private *i915 = to_i915(plane->dev);
+
+ if (DISPLAY_VER(i915) < 13)
+ return;
+
+ drm_plane_create_get_color_pipeline_property(plane->dev, plane, 2);
+
+ intel_prepare_plane_color_pipeline(plane);
+
+ /*
+ * default pipeline is set as 0 or "no color pipeline". All color h/w
+ * blocks are disabled at this stage.
+ */
+ drm_plane_add_color_pipeline(plane, "no color pipeline", NULL, 0);
+
+ if (icl_is_hdr_plane(i915, to_intel_plane(plane)->id))
+ drm_plane_add_color_pipeline(plane, "color pipeline hdr",
+ color_pipeline_hdr,
+ sizeof(color_pipeline_hdr));
+ else
+ drm_plane_add_color_pipeline(plane, "color pipeline sdr",
+ color_pipeline_sdr,
+ sizeof(color_pipeline_sdr));
+
+ drm_plane_attach_get_color_pipeline_property(plane);
+}
+
void intel_color_crtc_init(struct intel_crtc *crtc)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 8002492be709..aa649d13c6fa 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -10,6 +10,7 @@
struct intel_crtc_state;
struct intel_crtc;
+struct drm_plane;
struct drm_i915_private;
struct drm_property_blob;
@@ -29,5 +30,5 @@ bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state,
const struct drm_property_blob *blob2,
bool is_pre_csc_lut);
void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
-
+void intel_color_plane_init(struct drm_plane *plane);
#endif /* __INTEL_COLOR_H__ */
--
2.38.1
