Modern Qualcomm SoCs have a REFGEN (reference voltage generator) regulator, providing reference voltage to on-chip IP, like PHYs. Add a driver to support toggling that regulator. This driver is based on the driver available in the downstream msm-5.4 kernel. It's been cleaned up and partly remade to match upstream standards. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- drivers/regulator/Kconfig | 10 ++ drivers/regulator/Makefile | 1 + drivers/regulator/qcom-refgen-regulator.c | 187 ++++++++++++++++++++++++++++++ 3 files changed, 198 insertions(+) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 2c2405024ace..ea5549d62825 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -978,6 +978,16 @@ config REGULATOR_PWM This driver supports PWM controlled voltage regulators. PWM duty cycle can increase or decrease the voltage. +config REGULATOR_QCOM_REFGEN + tristate "Qualcomm REFGEN regulator driver" + depends on REGMAP + help + This driver supports the MMIO-mapped reference voltage regulator, + used internally by some PHYs on many Qualcomm SoCs. + + Say M here if you want to include support for this regulator as + a module. The module will be named "qcom-refgen-regulator". + config REGULATOR_QCOM_RPM tristate "Qualcomm RPM regulator driver" depends on MFD_QCOM_RPM diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index ebfa75379c20..a044ad20e202 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -107,6 +107,7 @@ obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o obj-$(CONFIG_REGULATOR_MTK_DVFSRC) += mtk-dvfsrc-regulator.o obj-$(CONFIG_REGULATOR_QCOM_LABIBB) += qcom-labibb-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_REFGEN) += qcom-refgen-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qcom-rpmh-regulator.o obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o diff --git a/drivers/regulator/qcom-refgen-regulator.c b/drivers/regulator/qcom-refgen-regulator.c new file mode 100644 index 000000000000..854ab91f649c --- /dev/null +++ b/drivers/regulator/qcom-refgen-regulator.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2017, 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2023, Linaro Limited + */ + +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/regulator/driver.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/of_regulator.h> + +#define REFGEN_REG_BIAS_EN 0x08 +#define REFGEN_BIAS_EN_MASK GENMASK(2, 0) + #define REFGEN_BIAS_EN_ENABLE 0x7 + #define REFGEN_BIAS_EN_DISABLE 0x6 + +#define REFGEN_REG_BG_CTRL 0x14 +#define REFGEN_BG_CTRL_MASK GENMASK(2, 1) + #define REFGEN_BG_CTRL_ENABLE 0x6 + #define REFGEN_BG_CTRL_DISABLE 0x4 + +#define REFGEN_REG_PWRDWN_CTRL5 0x80 +#define REFGEN_PWRDWN_CTRL5_MASK BIT(0) + #define REFGEN_PWRDWN_CTRL5_ENABLE 0x1 + #define REFGEN_PWRDWN_CTRL5_DISABLE 0x0 + +struct qcom_refgen { + struct regulator_desc rdesc; + struct regulator_dev *rdev; + void __iomem *base; +}; + +static int qcom_sdm845_refgen_enable(struct regulator_dev *rdev) +{ + struct qcom_refgen *vreg = rdev_get_drvdata(rdev); + + regmap_update_bits(vreg->base, REFGEN_REG_BG_CTRL, + REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_ENABLE); + regmap_write(vreg->base, REFGEN_REG_BIAS_EN, REFGEN_BIAS_EN_ENABLE); + + return 0; +} + +static int qcom_sdm845_refgen_disable(struct regulator_dev *rdev) +{ + struct qcom_refgen *vreg = rdev_get_drvdata(rdev); + + regmap_write(vreg->base, REFGEN_REG_BIAS_EN, REFGEN_BIAS_EN_DISABLE); + regmap_update_bits(vreg->base, REFGEN_REG_BG_CTRL, + REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_DISABLE); + + return 0; +} + +static int qcom_sdm845_refgen_is_enabled(struct regulator_dev *rdev) +{ + struct qcom_refgen *vreg = rdev_get_drvdata(rdev); + u32 val; + + regmap_read(vreg->base, REFGEN_REG_BG_CTRL, &val); + if (FIELD_GET(REFGEN_BG_CTRL_MASK, val) != REFGEN_BG_CTRL_ENABLE) + return 0; + + regmap_read(vreg->base, REFGEN_REG_BIAS_EN, &val); + if (FIELD_GET(REFGEN_BIAS_EN_MASK, val) != REFGEN_BIAS_EN_ENABLE) + return 0; + + return 1; +} + +static const struct regulator_ops sdm845_refgen_ops = { + .enable = qcom_sdm845_refgen_enable, + .disable = qcom_sdm845_refgen_disable, + .is_enabled = qcom_sdm845_refgen_is_enabled, +}; + +static int qcom_sm8250_refgen_enable(struct regulator_dev *rdev) +{ + struct qcom_refgen *vreg = rdev_get_drvdata(rdev); + + regmap_update_bits(vreg->base, REFGEN_REG_PWRDWN_CTRL5, + REFGEN_PWRDWN_CTRL5_MASK, REFGEN_PWRDWN_CTRL5_ENABLE); + + return 0; +} + +static int qcom_sm8250_refgen_disable(struct regulator_dev *rdev) +{ + struct qcom_refgen *vreg = rdev_get_drvdata(rdev); + + regmap_update_bits(vreg->base, REFGEN_REG_PWRDWN_CTRL5, + REFGEN_PWRDWN_CTRL5_MASK, REFGEN_PWRDWN_CTRL5_DISABLE); + + return 0; +} + +static int qcom_sm8250_refgen_is_enabled(struct regulator_dev *rdev) +{ + struct qcom_refgen *vreg = rdev_get_drvdata(rdev); + u32 val; + + regmap_read(vreg->base, REFGEN_REG_PWRDWN_CTRL5, &val); + + return FIELD_GET(REFGEN_PWRDWN_CTRL5_MASK, val) == REFGEN_PWRDWN_CTRL5_ENABLE; +} + +static const struct regulator_ops sm8250_refgen_ops = { + .enable = qcom_sm8250_refgen_enable, + .disable = qcom_sm8250_refgen_disable, + .is_enabled = qcom_sm8250_refgen_is_enabled, +}; + +static const struct regmap_config qcom_refgen_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .fast_io = true, +}; + +static int qcom_refgen_probe(struct platform_device *pdev) +{ + struct regulator_init_data *init_data; + struct regulator_config config = {}; + struct device *dev = &pdev->dev; + struct regulator_desc *rdesc; + struct qcom_refgen *vreg; + void __iomem *base; + + vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); + if (!vreg) + return -ENOMEM; + + vreg->rdesc.ops = of_device_get_match_data(dev); + if (!vreg->rdesc.ops) + return -ENODATA; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + vreg->base = devm_regmap_init_mmio(dev, base, &qcom_refgen_regmap_config); + if (IS_ERR(vreg->base)) + return PTR_ERR(vreg->base); + + init_data = of_get_regulator_init_data(dev, dev->of_node, &vreg->rdesc); + if (!init_data) + return -ENOMEM; + + rdesc = &vreg->rdesc; + + rdesc->name = "refgen"; + rdesc->owner = THIS_MODULE; + rdesc->type = REGULATOR_VOLTAGE; + rdesc->enable_time = 5; /* us */ + + config.dev = dev; + config.init_data = init_data; + config.driver_data = vreg; + config.of_node = dev->of_node; + + vreg->rdev = devm_regulator_register(dev, rdesc, &config); + if (IS_ERR(vreg->rdev)) + return PTR_ERR(vreg->rdev); + + return 0; +} + +static const struct of_device_id qcom_refgen_match_table[] = { + { .compatible = "qcom,sdm845-refgen-regulator", .data = &sdm845_refgen_ops }, + { .compatible = "qcom,sm8250-refgen-regulator", .data = &sm8250_refgen_ops }, + { } +}; + +static struct platform_driver qcom_refgen_driver = { + .probe = qcom_refgen_probe, + .driver = { + .name = "qcom-refgen-regulator", + .of_match_table = qcom_refgen_match_table, + }, +}; +module_platform_driver(qcom_refgen_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Qualcomm REFGEN regulator driver"); -- 2.41.0