Re: [PATCH 1/3] drm/msm/dpu: Add DPU_INTF_DATABUS_WIDEN feature flag for DPU >= 5.0

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On 14/06/2023 14:42, Marijn Suijten wrote:
On 2023-06-13 18:57:11, Jessica Zhang wrote:
DPU 5.x+ supports a databus widen mode that allows more data to be sent
per pclk. Enable this feature flag on all relevant chipsets.

Signed-off-by: Jessica Zhang <quic_jesszhan@xxxxxxxxxxx>
---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 ++-
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
  2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 36ba3f58dcdf..0be7bf0bfc41 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -103,7 +103,8 @@
  	(BIT(DPU_INTF_INPUT_CTRL) | \
  	 BIT(DPU_INTF_TE) | \
  	 BIT(DPU_INTF_STATUS_SUPPORTED) | \
-	 BIT(DPU_DATA_HCTL_EN))
+	 BIT(DPU_DATA_HCTL_EN) | \
+	 BIT(DPU_INTF_DATABUS_WIDEN))

This doesn't work.  DPU 5.0.0 is SM8150, which has DSI 6G 2.3.  In the
last patch for DSI you state and enable widebus for DSI 6G 2.5+ only,
meaning DPU and DSI are now desynced, and the output is completely
corrupted.

Is the bound in dsi_host wrong, or do DPU and DSI need to communicate
when widebus will be enabled, based on DPU && DSI supporting it?

I'd prefer to follow the second approach, as we did for DP. DPU asks the actual video output driver if widebus is to be enabled.


- Marijn

  #define INTF_SC7280_MASK (INTF_SC7180_MASK | BIT(DPU_INTF_DATA_COMPRESS))
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index b860784ade72..b9939e00f5e0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -182,6 +182,7 @@ enum {
   *                                  than video timing
   * @DPU_INTF_STATUS_SUPPORTED       INTF block has INTF_STATUS register
   * @DPU_INTF_DATA_COMPRESS          INTF block has DATA_COMPRESS register
+ * @DPU_INTF_DATABUS_WIDEN          INTF block has DATABUS_WIDEN register
   * @DPU_INTF_MAX
   */
  enum {
@@ -190,6 +191,7 @@ enum {
  	DPU_DATA_HCTL_EN,
  	DPU_INTF_STATUS_SUPPORTED,
  	DPU_INTF_DATA_COMPRESS,
+	DPU_INTF_DATABUS_WIDEN,
  	DPU_INTF_MAX
  };
--
2.40.1


--
With best wishes
Dmitry




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