On 26/05/2023 05.05, Adam Ford wrote: > This series fixes the blanking pack size and the PMS calculation. It then > adds support to allows the DSIM to dynamically DPHY clocks, and support > non-burst mode while allowing the removal of the hard-coded clock values > for the PLL for imx8m mini/nano/plus, and it allows the removal of the > burst-clock device tree entry when burst-mode isn't supported by connected > devices like an HDMI brige. In that event, the HS clock is set to the > value requested by the bridge chip. > > This has been tested on both an i.MX8M Nano and i.MX8M Plus, and should > work on i.MX8M Mini as well. Marek Szyprowski has tested it on various > Exynos boards. Hi all We're testing this on top of v6.4-rc4 on our imx8mp board, which has a ti-sn65dsi86 DSI -> DisplayPort bridge. We do get an image at 1920x1200, but the monitor says it's only at 58Hz, and measuring on the DSI signals does seem to confirm that the update frequency is about 57.7 or 57.8Hz (it's pretty hard to get a good measurement). It looks like it's the lines that are too long, by a time that corresponds to about 80 pixels. But all the frontporch/backporch/hsync values look sane and completely standard for that resolution. Setting samsung,burst-clock-frequency explicitly to something large enough or letting it be derived from the 154MHz pixel clock makes no difference. Any ideas? Thanks, Rasmus
