On 1.06.2023 20:30, Akhil P Oommen wrote:
> On Wed, May 31, 2023 at 10:30:09PM +0200, Konrad Dybcio wrote:
>>
>>
>>
>> On 31.05.2023 05:09, Bjorn Andersson wrote:
>>> From: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
>>>
>>> Introduce support for the Adreno A690, found in Qualcomm SC8280XP.
>>>
>>> Tested-by: Steev Klimaszewski <steev@xxxxxxxx>
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
>>> Signed-off-by: Bjorn Andersson <quic_bjorande@xxxxxxxxxxx>
>>> ---
>> Couple of additional nits that you may or may not incorporate:
>>
>> [...]
>>
>>> + {REG_A6XX_RBBM_CLOCK_HYST_SP0, 0x0000F3CF},
>> It would be cool if we could stop adding uppercase hex outside preprocessor
>> defines..
>>
>>
>> [...]
>>> + A6XX_PROTECT_RDONLY(0x0fc00, 0x01fff),
>>> + A6XX_PROTECT_NORDWR(0x11c00, 0x00000), /*note: infiite range */
>> typo
>>
>>
>>
>> -- Questions to Rob that don't really concern this patch --
>>
>>> +static void a690_build_bw_table(struct a6xx_hfi_msg_bw_table *msg)
>> Rob, I'll be looking into reworking these into dynamic tables.. would you
>> be okay with two more additions (A730, A740) on top of this before I do that?
>> The number of these funcs has risen quite a bit and we're abusing the fact
>> that so far there's a 1-1 mapping of SoC-Adreno (at the current state of
>> mainline, not in general)..
>
> +1. But please leave a618 and 7c3 as it is.
OK I'll note that
Konrad
>
> -Akhil
>
>>
>>> +{
>>> + /*
>>> + * Send a single "off" entry just to get things running
>>> + * TODO: bus scaling
>>> + */
>> Also something I'll be looking into in the near future..
>>
>>> @@ -531,6 +562,8 @@ static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu)
>>> adreno_7c3_build_bw_table(&msg);
>>> else if (adreno_is_a660(adreno_gpu))
>>> a660_build_bw_table(&msg);
>>> + else if (adreno_is_a690(adreno_gpu))
>>> + a690_build_bw_table(&msg);
>>> else
>>> a6xx_build_bw_table(&msg);
>> I think changing the is_adreno_... to switch statements with a gpu_model
>> var would make it easier to read.. Should I also rework that?
>>
>> Konrad
>>
>>>
>>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
>>> index 8cff86e9d35c..e5a865024e94 100644
>>> --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
>>> +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
>>> @@ -355,6 +355,20 @@ static const struct adreno_info gpulist[] = {
>>> .init = a6xx_gpu_init,
>>> .zapfw = "a640_zap.mdt",
>>> .hwcg = a640_hwcg,
>>> + }, {
>>> + .rev = ADRENO_REV(6, 9, 0, ANY_ID),
>>> + .revn = 690,
>>> + .name = "A690",
>>> + .fw = {
>>> + [ADRENO_FW_SQE] = "a660_sqe.fw",
>>> + [ADRENO_FW_GMU] = "a690_gmu.bin",
>>> + },
>>> + .gmem = SZ_4M,
>>> + .inactive_period = DRM_MSM_INACTIVE_PERIOD,
>>> + .init = a6xx_gpu_init,
>>> + .zapfw = "a690_zap.mdt",
>>> + .hwcg = a690_hwcg,
>>> + .address_space_size = SZ_16G,
>>> },
>>> };
>>>
>>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>> index f62612a5c70f..ac9c429ca07b 100644
>>> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>> @@ -55,7 +55,7 @@ struct adreno_reglist {
>>> u32 value;
>>> };
>>>
>>> -extern const struct adreno_reglist a615_hwcg[], a630_hwcg[], a640_hwcg[], a650_hwcg[], a660_hwcg[];
>>> +extern const struct adreno_reglist a615_hwcg[], a630_hwcg[], a640_hwcg[], a650_hwcg[], a660_hwcg[], a690_hwcg[];
>>>
>>> struct adreno_info {
>>> struct adreno_rev rev;
>>> @@ -272,6 +272,11 @@ static inline int adreno_is_a660(struct adreno_gpu *gpu)
>>> return gpu->revn == 660;
>>> }
>>>
>>> +static inline int adreno_is_a690(struct adreno_gpu *gpu)
>>> +{
>>> + return gpu->revn == 690;
>>> +};
>>> +
>>> /* check for a615, a616, a618, a619 or any derivatives */
>>> static inline int adreno_is_a615_family(struct adreno_gpu *gpu)
>>> {
>>> @@ -280,13 +285,13 @@ static inline int adreno_is_a615_family(struct adreno_gpu *gpu)
>>>
>>> static inline int adreno_is_a660_family(struct adreno_gpu *gpu)
>>> {
>>> - return adreno_is_a660(gpu) || adreno_is_7c3(gpu);
>>> + return adreno_is_a660(gpu) || adreno_is_a690(gpu) || adreno_is_7c3(gpu);
>>> }
>>>
>>> /* check for a650, a660, or any derivatives */
>>> static inline int adreno_is_a650_family(struct adreno_gpu *gpu)
>>> {
>>> - return gpu->revn == 650 || gpu->revn == 620 || adreno_is_a660_family(gpu);
>>> + return gpu->revn == 650 || gpu->revn == 620 || adreno_is_a660_family(gpu);
>>> }
>>>
>>> u64 adreno_private_address_space_size(struct msm_gpu *gpu);
