Now those CLK IDs were added to the public bindings header, switch
to use those defines and drop the PRIV defines.
Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
---
drivers/clk/meson/g12a.c | 18 +++++++++---------
drivers/clk/meson/g12a.h | 3 ---
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index a132aad2aac9..461ebd79497c 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -4411,7 +4411,7 @@ static struct clk_hw_onecell_data g12a_hw_onecell_data = {
[CLKID_PRIV_VID_PLL_SEL] = &g12a_vid_pll_sel.hw,
[CLKID_PRIV_VID_PLL_DIV] = &g12a_vid_pll.hw,
[CLKID_PRIV_VCLK_SEL] = &g12a_vclk_sel.hw,
- [CLKID_PRIV_VCLK2_SEL] = &g12a_vclk2_sel.hw,
+ [CLKID_VCLK2_SEL] = &g12a_vclk2_sel.hw,
[CLKID_PRIV_VCLK_INPUT] = &g12a_vclk_input.hw,
[CLKID_PRIV_VCLK2_INPUT] = &g12a_vclk2_input.hw,
[CLKID_PRIV_VCLK_DIV] = &g12a_vclk_div.hw,
@@ -4438,12 +4438,12 @@ static struct clk_hw_onecell_data g12a_hw_onecell_data = {
[CLKID_VCLK2_DIV12] = &g12a_vclk2_div12.hw,
[CLKID_PRIV_CTS_ENCI_SEL] = &g12a_cts_enci_sel.hw,
[CLKID_PRIV_CTS_ENCP_SEL] = &g12a_cts_encp_sel.hw,
- [CLKID_PRIV_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
+ [CLKID_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
[CLKID_PRIV_CTS_VDAC_SEL] = &g12a_cts_vdac_sel.hw,
[CLKID_PRIV_HDMI_TX_SEL] = &g12a_hdmi_tx_sel.hw,
[CLKID_CTS_ENCI] = &g12a_cts_enci.hw,
[CLKID_CTS_ENCP] = &g12a_cts_encp.hw,
- [CLKID_PRIV_CTS_ENCL] = &g12a_cts_encl.hw,
+ [CLKID_CTS_ENCL] = &g12a_cts_encl.hw,
[CLKID_CTS_VDAC] = &g12a_cts_vdac.hw,
[CLKID_HDMI_TX] = &g12a_hdmi_tx.hw,
[CLKID_PRIV_HDMI_SEL] = &g12a_hdmi_sel.hw,
@@ -4642,7 +4642,7 @@ static struct clk_hw_onecell_data g12b_hw_onecell_data = {
[CLKID_PRIV_VID_PLL_SEL] = &g12a_vid_pll_sel.hw,
[CLKID_PRIV_VID_PLL_DIV] = &g12a_vid_pll.hw,
[CLKID_PRIV_VCLK_SEL] = &g12a_vclk_sel.hw,
- [CLKID_PRIV_VCLK2_SEL] = &g12a_vclk2_sel.hw,
+ [CLKID_VCLK2_SEL] = &g12a_vclk2_sel.hw,
[CLKID_PRIV_VCLK_INPUT] = &g12a_vclk_input.hw,
[CLKID_PRIV_VCLK2_INPUT] = &g12a_vclk2_input.hw,
[CLKID_PRIV_VCLK_DIV] = &g12a_vclk_div.hw,
@@ -4669,12 +4669,12 @@ static struct clk_hw_onecell_data g12b_hw_onecell_data = {
[CLKID_VCLK2_DIV12] = &g12a_vclk2_div12.hw,
[CLKID_PRIV_CTS_ENCI_SEL] = &g12a_cts_enci_sel.hw,
[CLKID_PRIV_CTS_ENCP_SEL] = &g12a_cts_encp_sel.hw,
- [CLKID_PRIV_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
+ [CLKID_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
[CLKID_PRIV_CTS_VDAC_SEL] = &g12a_cts_vdac_sel.hw,
[CLKID_PRIV_HDMI_TX_SEL] = &g12a_hdmi_tx_sel.hw,
[CLKID_CTS_ENCI] = &g12a_cts_enci.hw,
[CLKID_CTS_ENCP] = &g12a_cts_encp.hw,
- [CLKID_PRIV_CTS_ENCL] = &g12a_cts_encl.hw,
+ [CLKID_CTS_ENCL] = &g12a_cts_encl.hw,
[CLKID_CTS_VDAC] = &g12a_cts_vdac.hw,
[CLKID_HDMI_TX] = &g12a_hdmi_tx.hw,
[CLKID_PRIV_HDMI_SEL] = &g12a_hdmi_sel.hw,
@@ -4908,7 +4908,7 @@ static struct clk_hw_onecell_data sm1_hw_onecell_data = {
[CLKID_PRIV_VID_PLL_SEL] = &g12a_vid_pll_sel.hw,
[CLKID_PRIV_VID_PLL_DIV] = &g12a_vid_pll.hw,
[CLKID_PRIV_VCLK_SEL] = &g12a_vclk_sel.hw,
- [CLKID_PRIV_VCLK2_SEL] = &g12a_vclk2_sel.hw,
+ [CLKID_VCLK2_SEL] = &g12a_vclk2_sel.hw,
[CLKID_PRIV_VCLK_INPUT] = &g12a_vclk_input.hw,
[CLKID_PRIV_VCLK2_INPUT] = &g12a_vclk2_input.hw,
[CLKID_PRIV_VCLK_DIV] = &g12a_vclk_div.hw,
@@ -4935,12 +4935,12 @@ static struct clk_hw_onecell_data sm1_hw_onecell_data = {
[CLKID_VCLK2_DIV12] = &g12a_vclk2_div12.hw,
[CLKID_PRIV_CTS_ENCI_SEL] = &g12a_cts_enci_sel.hw,
[CLKID_PRIV_CTS_ENCP_SEL] = &g12a_cts_encp_sel.hw,
- [CLKID_PRIV_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
+ [CLKID_CTS_ENCL_SEL] = &g12a_cts_encl_sel.hw,
[CLKID_PRIV_CTS_VDAC_SEL] = &g12a_cts_vdac_sel.hw,
[CLKID_PRIV_HDMI_TX_SEL] = &g12a_hdmi_tx_sel.hw,
[CLKID_CTS_ENCI] = &g12a_cts_enci.hw,
[CLKID_CTS_ENCP] = &g12a_cts_encp.hw,
- [CLKID_PRIV_CTS_ENCL] = &g12a_cts_encl.hw,
+ [CLKID_CTS_ENCL] = &g12a_cts_encl.hw,
[CLKID_CTS_VDAC] = &g12a_cts_vdac.hw,
[CLKID_HDMI_TX] = &g12a_hdmi_tx.hw,
[CLKID_PRIV_HDMI_SEL] = &g12a_hdmi_sel.hw,
diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h
index 9a3091fcaa41..8275413f2beb 100644
--- a/drivers/clk/meson/g12a.h
+++ b/drivers/clk/meson/g12a.h
@@ -168,7 +168,6 @@
#define CLKID_PRIV_VID_PLL_SEL 130
#define CLKID_PRIV_VID_PLL_DIV 131
#define CLKID_PRIV_VCLK_SEL 132
-#define CLKID_PRIV_VCLK2_SEL 133
#define CLKID_PRIV_VCLK_INPUT 134
#define CLKID_PRIV_VCLK2_INPUT 135
#define CLKID_PRIV_VCLK_DIV 136
@@ -265,8 +264,6 @@
#define CLKID_PRIV_NNA_CORE_CLK_SEL 265
#define CLKID_PRIV_NNA_CORE_CLK_DIV 266
#define CLKID_PRIV_MIPI_DSI_PXCLK_DIV 268
-#define CLKID_PRIV_CTS_ENCL 271
-#define CLKID_PRIV_CTS_ENCL_SEL 272
#define NR_CLKS 273
--
2.34.1
