On 2023-05-22 18:30:08, Konrad Dybcio wrote:
> On 22.05.2023 03:19, Dmitry Baryshkov wrote:
> > On 22/05/2023 00:23, Marijn Suijten wrote:
> >> This SOFEF01-M Display-IC driver supports two modes with different
> >> compatibles to differentiate between slightly different physical sizes
> >> (panels) found on the Xperia 5 (6.1") and 10 II (6.0").
> >>
> >> It is currently also used to hardcode significantly higher fake porches
> >> for the Xperia 5, which are unused in transfers due to this being a
> >> command-mode panel but do have an effect on the clock rates set by
> >> dsi_host.c. Without higher clock rates this panel fails to achieve
> >> 60fps and has significant tearing artifacts, while the same calculated
> >> clock rate works perfectly fine on the Xperia 10 II.
<snip>
> >> +/* Sony Xperia 5 (kumano bahamut) */
> >> +static const struct drm_display_mode samsung_sofef01_m_bahamut_mode = {
> >> + /*
> >> + * WARNING: These massive porches are wrong/useless for CMDmode
> >> + * (and not defined in downstream DTS) but necessary to bump dsi
> >> + * clocks higher, so that we can achieve proper 60fps without tearing.
> >> + */
> >> + .clock = (1080 + 156 + 8 + 8) * (2520 + 2393 + 8 + 8) * 60 / 1000,
> >> + .hdisplay = 1080,
> >> + .hsync_start = 1080 + 156,
> >> + .hsync_end = 1080 + 156 + 8,
> >> + .htotal = 1080 + 156 + 8 + 8,
> >> + .vdisplay = 2520,
> >> + .vsync_start = 2520 + 2393,
> >> + .vsync_end = 2520 + 2393 + 8,
> >> + .vtotal = 2520 + 2393 + 8 + 8,
> >> + .width_mm = 61,
> >> + .height_mm = 142,
> >> +};
> >> +
> >> +/* Sony Xperia 10 II (seine pdx201) */
> >> +static const struct drm_display_mode samsung_sofef01_m_pdx201_mode = {
> >> + .clock = (1080 + 8 + 8 + 8) * (2520 + 8 + 8 + 8) * 60 / 1000,
> >> + .hdisplay = 1080,
> >> + .hsync_start = 1080 + 8,
> >> + .hsync_end = 1080 + 8 + 8,
> >> + .htotal = 1080 + 8 + 8 + 8,
> >> + .vdisplay = 2520,
> >> + .vsync_start = 2520 + 8,
> >> + .vsync_end = 2520 + 8 + 8,
> >> + .vtotal = 2520 + 8 + 8 + 8,
> >> + .width_mm = 60,
> >> + .height_mm = 139,
> >> +};
> >> +
> >> +static const struct of_device_id samsung_sofef01_m_of_match[] = {
> >> + { .compatible = "samsung,sofef01-m-bahamut", .data = &samsung_sofef01_m_bahamut_mode },
> >> + { .compatible = "samsung,sofef01-m-pdx201", .data = &samsung_sofef01_m_pdx201_mode },
> >
> > Are there really two panels? Can we use one mode for both usecases?
> The porches differ by a significant margin but that may or may not
> matter for cmd mode.. If we come to unify them, one can add width-mm
> (or something like that) in the device tree if that turns out to be
> the only difference.
See patch description: they matter in that I can abuse them to force a
higher pclk on the DSI, otherwise the Xperia 5 refuses to vsync at 60fps
(and has artifacts) while the Xperia 10 II runs flawless (but I should
check the clock tree to confirm that the value is the same).
Downstream has:
qcom,mdss-dsi-panel-clockrate = <1132293600>;
But that is for the bitclk, which should theoretically be multiplied by
lanes=4 and divided by bpp=24 for the pclk, and divided by 8 for the
byte clock (without being multiplied by lanes...?).
I do think I have the panel names now, which we could use to
differentiate these actually-different panels on the same Display-IC
instead.
- Marijn
