Declaring the mask of supported interrupts proved to be error-prone. It is very easy to add a bit with no corresponding backing block or to miss the INTF TE bit. Replace this static configuration with the irq mask calculated from the HW catalog data. Changes since v1: - Enable dpu_caps::has_7xxx_intr for DPU >= 7.0 (Neil) Dmitry Baryshkov (6): drm/msm/dpu: don't set DPU_INTF_TE globally drm/msm/dpu: inline __intr_offset drm/msm/dpu: split interrupt address arrays drm/msm/dpu: autodetect supported interrupts drm/msm/dpu: drop now-unused mdss_irqs field from hw catalog drm/msm/dpu: drop compatibility INTR defines .../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8 -- .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 9 -- .../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 11 -- .../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 13 --- .../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 10 -- .../msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 6 - .../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 5 - .../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 5 - .../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 14 +-- .../msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 10 +- .../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 19 +-- .../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 14 +-- .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 14 +-- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 5 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 110 ++++++++++++------ .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 21 ++-- 17 files changed, 102 insertions(+), 175 deletions(-) -- 2.39.2
