On 2023-05-22 10:48:01, Dan Carpenter wrote:
> The "vsync_hz" variable is used to store negative error codes so it
> needs to be signed for the error checking to work correctly.
Nicely spotted, but it it looks like we have more to fix then. The type
returned by dpu_kms_get_clk_rate() is u64:
- Perhaps the int used in this patch is too small (though 19.2MHz vsync
clock ought to fit);
- That function should also return a signed number as part of this
contract.
- Marijn
>
> Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> index 74470d068622..b29e6d1ba7f6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
> @@ -320,7 +320,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config(
> struct dpu_hw_tear_check tc_cfg = { 0 };
> struct drm_display_mode *mode;
> bool tc_enable = true;
> - u32 vsync_hz;
> + int vsync_hz;
> struct dpu_kms *dpu_kms;
>
> if (!phys_enc->hw_pp) {
> --
> 2.39.2
>
