On 21/04/2023 02:25, Kuogee Hsieh wrote:
Add support for DSC 1.2 by providing the necessary hooks to program the DPU DSC 1.2 encoder. Signed-off-by: Kuogee Hsieh <quic_khsieh@xxxxxxxxxxx> --- drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 38 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 17 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c | 388 +++++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 +- 5 files changed, 444 insertions(+), 7 deletions(-) create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c
[skipped]
+static inline void _dsc_subblk_offset(struct dpu_hw_dsc *hw_dsc, int s_id, + u32 *offset) +{ + const struct dpu_dsc_sub_blks *sblk; + + sblk = hw_dsc->caps->sblk; + + if (s_id == DPU_DSC_ENC) + *offset = sblk->enc.base; + else if (s_id == DPU_DSC_CTL) + *offset = sblk->ctl.base; + else + DPU_ERROR("invalid DSC sub block=%d\n", s_id); +}
I have just sent a patchset removing the _sspp_subblk_offset. Could you please inline this function too?
+ +static void dpu_hw_dsc_disable_1_2(struct dpu_hw_dsc *hw_dsc) +{ + struct dpu_hw_blk_reg_map *hw; + u32 offset; + + if (!hw_dsc) + return; + + _dsc_subblk_offset(hw_dsc, DPU_DSC_CTL, &offset); + + hw = &hw_dsc->hw; + DPU_REG_WRITE(hw, offset + DSC_CFG, 0); + + _dsc_subblk_offset(hw_dsc, DPU_DSC_ENC, &offset); + + DPU_REG_WRITE(hw, offset + ENC_DF_CTRL, 0); + DPU_REG_WRITE(hw, offset + DSC_MAIN_CONF, 0); +} +
-- With best wishes Dmitry