Re: [Intel-gfx] [PATCH 4/8] drm/i915/mtl: workaround coherency issue for Media

[Andi Shyti <andi.shyti@xxxxxxxxx>]

Hi Fei,

> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -743,6 +743,13 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
>  	if (IS_ERR(obj))
>  		return ERR_CAST(obj);
>  
> +	/*
> +	 * Wa_22016122933: For MTL the shared memory needs to be mapped
> +	 * as WC on CPU side and UC (PAT index 2) on GPU side

Isn't UC PAT index 3?

Andi