Signed-off-by: Sarah Walker <sarah.walker@xxxxxxxxxx> --- .../devicetree/bindings/gpu/img,powervr.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/img,powervr.yaml diff --git a/Documentation/devicetree/bindings/gpu/img,powervr.yaml b/Documentation/devicetree/bindings/gpu/img,powervr.yaml new file mode 100644 index 000000000000..f722fd1d4e8f --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/img,powervr.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR MIT) +# Copyright (c) 2022 Imagination Technologies Ltd. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/gpu/img-powervr.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Imagination Technologies PowerVR GPU + +maintainers: + - Sarah Walker <sarah.walker@xxxxxxxxxx> + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt8173-gpu + - const: img,powervr-series6xt + - items: + - enum: + - ti,am62-gpu + - const: img,powervr-seriesaxe + + reg: + minItems: 1 + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + items: + - const: core_clk + - const: mem_clk + - const: sys_clk + + interrupts: + items: + - description: GPU interrupt + + interrupt-names: + items: + - const: gpu + + power-domains: + maxItems: 1 + + operating-points-v2: true + power-supply: true + + "#cooling-cells": + const: 2 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8173-gpu + then: + properties: + reg: + minItems: 2 + maxItems: 2 + - if: + properties: + compatible: + contains: + const: img,powervr-series6xt + then: + properties: + clocks: + minItems: 3 + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu@13000000 { + compatible = "mediatek,mt8173-gpu", "img,powervr-series6xt"; + reg = <0 0x13000000 0 0xffff>, <0 0x13fff000 0 0x1000>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_MFG>; + power-supply = <&da9211_vgpu_reg>; + operating-points-v2 = <&gpu_opp_table>; + clocks = <&gpu_ckgen 0>, + <&gpu_ckgen 1>, + <&gpu_ckgen 2>; + clock-names = "core_clk", + "mem_clk", + "sys_clk"; + interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "gpu"; + }; + -- 2.40.0