On 28/02/2023 18:31, Jani Nikula wrote:
On Tue, 28 Feb 2023, Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> wrote:
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations,
include them here for completeness.
Need to run now, note to self:
Does i915 use the arrays to limit the bpp/bpc combos supported by
hardware? Do we need to add separate limiting in i915.
There is already a limitation in intel_dsc_compute_params(): the driver
uses DRM_DSC_1_1_PRE_SCR only in a limited amount of cases (bpp 8 or 12,
bpc 8, 10 or 12). But thanks, I noticed a bug there.
BR,
Jani.
--
With best wishes
Dmitry
