On Thu, Feb 23, 2023 at 03:20:28PM -0500, Rodrigo Vivi wrote:
> On Fri, Feb 24, 2023 at 12:11:40AM +0530, Badal Nilawar wrote:
> > Apply Wa_14017073508 for MTL SoC die A step instead of graphics step.
> > To get the SoC die stepping there is no direct interface so using
> > revid as revid 0 aligns with SoC die A step.
> >
> > Bspec: 55420
>
> This doesn't prove anything. It is just saying Die A0 with GT A0,
> die B0 with GT B0 and so on... Please help me to understand that
> better offline before we move forward...
The definition of the workaround doesn't say anything about SoC
steppings that I can see. The workaround itself is tagged as being
being tied to Xe_LPM+ (i.e., the media IP), not to MTL as a platform and
not to the Xe_LPG graphics IP. In relation to the media IP
specifically, the bounds are listed as needed from A0, fixed in B0. So
unless there's a belief that the workaround itself is incorrect, I think
the bounds should be
IS_MTL_MEDIA_STEP(i915, STEP_A0, STEP_B0)
Matt
>
> >
> > Fixes: 8f70f1ec587d ("drm/i915/mtl: Add Wa_14017073508 for SAMedia")
> > Signed-off-by: Badal Nilawar <badal.nilawar@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++--
> > drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c | 2 +-
> > 2 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> > index cef3d6f5c34e..4ba3c8c97ccc 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> > @@ -29,7 +29,7 @@
> > static void mtl_media_busy(struct intel_gt *gt)
> > {
> > /* Wa_14017073508: mtl */
> > - if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> > + if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
> > gt->type == GT_MEDIA)
> > snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
> > PCODE_MBOX_GT_STATE_MEDIA_BUSY,
> > @@ -39,7 +39,7 @@ static void mtl_media_busy(struct intel_gt *gt)
> > static void mtl_media_idle(struct intel_gt *gt)
> > {
> > /* Wa_14017073508: mtl */
> > - if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> > + if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
> > gt->type == GT_MEDIA)
> > snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
> > PCODE_MBOX_GT_STATE_MEDIA_NOT_BUSY,
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> > index fcf51614f9a4..7429c233ad45 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> > @@ -19,7 +19,7 @@ static bool __guc_rc_supported(struct intel_guc *guc)
> > * Do not enable gucrc to avoid additional interrupts which
> > * may disrupt pcode wa.
> > */
> > - if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> > + if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
> > gt->type == GT_MEDIA)
> > return false;
> >
> > --
> > 2.25.1
> >
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
